1. Field of the Invention
The present invention relates to a microcomputer provided with a plurality of peripheral circuits.
2. Description of the Prior Art
A microcomputer is composed of a central processing unit (CPU) and various peripheral circuits such as data and program memories, I/O ports, and timer-counters. Microcomputers are classified into special-purpose and general-purpose models, of which special-purpose models are often called ASICs (application-specific integrated circuits).
With a special-purpose microcomputer, its peripheral circuits are designed according to a specific application, and therefore efficient processing performance can be expected. On the other hand, its newly designed portion requires extra development time, which sometimes makes it impossible to develop such a microcomputer in time for the development of the device in which the microcomputer is to be incorporated when its development schedule is tight.
A general-purpose microcomputer is designed to cope with a wide range of applications, and is therefore provided with various functions. However, those functions and their performance do not always satisfy the specifications required in a specific application. Therefore, it is necessary, first of all, to select a model that satisfies the desired specifications. However, it is difficult to judge whether a given model is provided with functions that satisfy the desired specifications or not, and improper selection of a model might invite, in the middle of the designing of a program, change of the model of the microcomputer to be used or alterations to the specifications of the application. In either way, improper selection of a model of a microcomputer leads to a delay in the development of an application.
A general-purpose microcomputer is so devised as to achieve intelligent functions through interlocked operation of a plurality of peripheral circuits. For example, there is known a function called xe2x80x9cinput capture,xe2x80x9d which is realized through interlocked operation of a timer-counter and an I/O port.
This function permits the count value of a timer to be stored in a special-purpose register every time a rising or trailing edge is detected in an external input signal. Thus, this function is useful in measuring the period for which an external input signal remains at a high or low level.
Now, how the periods of an external input signal are measured will be described with reference to FIG. 21, taking up as an example a case in which a timer is operating on a system clock having a frequency of 4 [MHz] and, as an external input signal, a pulse is fed in that remains for 1.5 [xcexcs] at a high level and for 0.5 [xcexcs] at a low level. Every time the external input signal EXT_IN rises or falls, the count value T of the timer is stored in a special-purpose register R, then the count value T is reset, and then the timer start counting again.
Moreover, every time the external input signal EXT_IN rises or falls, an interrupt request occurs. In the software procedure, of which a flow chart is shown in FIG. 22, executed when an interrupt request has occurred due to the external input signal EXT_IN, first, whether the cause for the interrupt request is a rising edge in the external input signal EXT_IN or not is checked (S801).
If the cause is a rising edge in the external input signal EXT_IN (xe2x80x9cYesxe2x80x9d in S801), the value in the register R is saved as the period (hereinafter the xe2x80x9clow periodxe2x80x9d) for which the external input signal EXT_IN remains at a low level (S802). If not (xe2x80x9cNoxe2x80x9d in S801), the value in the register R is saved as the period (hereinafter the xe2x80x9chigh periodxe2x80x9d) for which the external input signal EXT_IN remains at a high level (S803).
Here, the count value of the timer is written repeatedly to the same register, and therefore it is necessary, before the register is overwritten with a new value, to save the value in the register. In the example under discussion, only 0.5 [xcexcs] is available for the saving of the high period of the external input signal. This corresponds to two states in a CPU that operates on a system clock having a frequency of 4 [MHz], and, within two states, it can be impossible to jump to the address of and complete the execution of the software interrupt procedure.
In this case, to make the measurement possible, it is necessary to use two input capture functions. Specifically, the signal to be measured are input to two I/O ports each having an input capture functions, and two timers are used to measure two separate times. This will be described with reference to FIG. 23.
On every rising or trailing edge in the external input signal EXT_IN1 fed to it, one input capture function stores the count value T1 of one timer in a register R1, then the count value T1 is reset, and then the timer start counting again. On every trailing edge in the external input signal EXT_IN2 fed to it, the other input capture function stores the count value T2 of the other timer in a register R2, then the count value T2 is reset, and then the timer start counting again.
Moreover, on every rising or trailing edge in the external input signal EXT_IN1 and on every trailing edge in the external input signal EXT_IN2, an interrupt request occurs. Flow charts of the software procedure executed on occurrence of an interrupt request is shown in FIGS. 24 and 25.
When an interrupt request has occurred due to the external input signal EXT_IN1, if the cause of the interrupt request is a rising edge in the external input signal EXT_IN1 (xe2x80x9cYesxe2x80x9d in S901), the value in the corresponding register R1 is saved as the low period (S902). On the other hand, when an interrupt request has occurred due to the external input signal EXT_IN2, the value calculated by subtracting the low period saved in the register R1 from the value in the corresponding register R2 is saved as the high period (S1001).
However, in this method, an extra I/O port needs to be used in addition to an extra timer. Moreover, in a special-purpose microcomputer, a signal from a single terminal can be fed to different circuit blocks. More important, it takes long for a programmer to hit upon this method.
Even if a programmer hits upon this method, an extra I/O port having an input capture function needs to be free. In the course of the development of a device in which a microcomputer is to be incorporated, when the development of a program for the microcomputer is underway, the design of the circuitry including the microcomputer has, in most cases, already been determined.
For these reasons, if an alteration becomes necessary in the allocation for use of I/O ports having special functions in the middle of the designing of the program for the microcomputer, it may affect the development schedule of the device as a whole. Moreover, it is questionable whether one can foresee, at the stage of the selection of the model of the microcomputer, that the measurement of a single signal will require as many as two I/O ports having such special functions.
In this way, in a case where a general-purpose microcomputer is incorporated in a device including specialized operation, unexpected problems are likely to arise, which often leads to a delay in the development of the device as a whole.
In a situation where sufficient time for the development of a special-purpose microcomputer is not available, and in addition it is difficult to judge whether the peripheral circuit functions of a general-purpose microcomputer satisfy the specifications of the device as an end product or not, it is possible, as disclosed in Japanese Patent Application Laid-Open No. H5-127913, to develop simultaneously the desired peripheral circuit functions and the desired program by the use of a programmable gate array.
However, precisely because of the principles on which a programmable gate array is based, using one to realize peripheral circuit functions results in a larger circuit area than otherwise. Moreover, necessary peripheral circuit functions are unknown beforehand, and therefore it is necessary to secure an extra number of gates. This leads to a higher cost than a special-purpose microcomputer. Furthermore, the manufacture of a programmable gate array requires a special process, and therefore forming it together with other devices on a single chip requires special techniques. Thus, no such process has come into practical use to date with microcomputers for incorporation in devices.
As described above, a special-purpose microcomputer requires long development time. On the other hand, with a general-purpose microcomputer, it is difficult to judge whether it is provided with peripheral circuit functions that satisfy the specifications of the device in which it is to be incorporated. Thus, if it is found, in the middle of the development of the program, that the general-purpose microcomputer does not satisfy the specifications of the device, it is inevitable to change the model of the general-purpose microcomputer or alter the specifications of the device.
Even if a programmer hits upon a method of satisfying the specifications required by the device by the use of the limited peripheral circuit functions of the general-purpose microcomputer, it cannot always be realized by programming alone and may need alterations in the circuitry of the device as a whole. Moreover, it takes long for the programmer to hit upon such a special solution. In either way, a delay is risked in the development schedule of the device as a whole.
Moreover, in the designing of the device, from the viewpoint of its manufacturing cost, the choice of the model of the general-purpose microcomputer is in most cases limited. Nevertheless, in a case where a model that satisfies the specifications required by the device is available only in a higher price range, there is no choice but to use that model. This leads to a higher cost.
An object of the present invention is to provide a microcomputer having intelligent peripheral circuit functions, such as are associated rather with a special-purpose microcomputer than with a general-purpose microcomputer, without using special manufacturing techniques or processes or spending a long time as in the development of a special-purpose microcomputer.
To achieve the above object, according to the present invention, a microcomputer including a plurality of peripheral circuits is provided with a connecting circuit that permits the interconnection among those peripheral circuits to be controlled through execution of a program.
In this configuration, by interconnecting the individual, basic peripheral circuits with the connecting circuit through execution of a program, it is possible to realize intelligent functions such as are not realized by those individual, basic peripheral circuits on their own. This makes it possible to avoid inviting a higher cost by having to select a model having an excess of functions as in a case where a general-purpose microcomputer is used. Moreover, as long as basic peripheral circuits that are expected to be necessary are incorporated in a microcomputer, there is no need to design the peripheral circuits in detail. This helps shorten the development time of the device as a whole in which the microcomputer is to be incorporated. Furthermore, whereas, in a microcomputer provided with specialized peripheral circuits, the development of a software program requires a bread board, a microcomputer according to the present invention permits its peripheral circuits to be determined at the time of the debugging of the software program. This also contributes to the shortening of the development time.
In short, with a microcomputer according to the present invention, it is possible to realize intelligent peripheral circuit functions, such as are associated rather with a special-purpose microcomputer than with a general-purpose microcomputer, without using special manufacturing techniques or processes or spending a long time as in the development of a special-purpose microcomputer. Moreover, it is possible to alter the peripheral circuits at the time of the designing of the software program so that they offer higher efficiency.